DC-DC switching voltage regulator and Low Drop-Out (LDO) linear voltage regulator are types of voltage regulators. A Buck converter and a Boost converter are types of DC-DC switching voltage regulators. In particular, a Buck converter is a step-down voltage converter used when the output voltage is lower in magnitude than the input voltage (e.g., input is 3V and output is 1V), while a Boost converter is a step-up voltage converter used when the output voltage is higher in magnitude compared to the input voltage (e.g., input is 2V and output is 3.6V). Throughout this disclosure, the terms “voltage regulator,” “voltage converter,” “regulator,” and “converter” may be used interchangeably depending on the context. Further, the terms “LDO linear voltage regulator” and “LDO” may be used interchangeably depending on the context.
Most voltage regulators share a special behavior during start-up (i.e., when the power supply is turned ON), shut-down (i.e., when the power supply is turned OFF or when the regulator is disabled) and during any transient activity (i.e., when spurious power supply disturbances occur) that requires output voltage adjustment. For example, if a DC-DC switching voltage regulator is turned ON in an uncontrolled fashion; the input current as well as the output voltage may behave in a way that can damage the regulator components/the load circuit. Similarly, during shut-down, regulator/load components can experience current/voltage stresses if the DC-DC switching voltage regulator does not include any proper current limiting circuitry. Typically, DC-DC switching voltage regulators have a controlled path between the output node and ground. This controlled path prevents any leakage current to ground and thus improves power efficiency. During any transient behavior that requires a discharge of the output node, this controlled path results in very long settling time for the output node voltage, especially for small current loads.
FIG. 1 shows a typical output voltage waveform (100) observed at an output terminal of a typical regulator during start-up without using proper voltage or current controller circuits. This typical voltage waveform (100) includes a fast ramping voltage rise (101) resulting in a voltage overshoot (102) that depends on the circuit loop dynamics of the regulator. Based on the load and its application, either of these two effects (fast ramping voltage and voltage overshoot) can damage external components that are specified to tolerate much lower voltage ratings for steady state operations.
Also, FIG. 1 shows a typical input current waveform (110) observed flowing into the output stage of a typical regulator during start-up without using proper protection circuits (e.g., voltage and current controller circuits). In this typical current waveform (110), the peak current (111) reaches much higher values than the targeted average load current (112). Since, a typical DC-DC switching voltage regulator has an off-chip output stage; such peak current (111) can destroy both bond wires and external components if not controlled properly. Proper choice of external components and bond wires to tolerate the peak current (111) without component damage will lead to a high-cost solution. Even with this costly solution, this peak current is withdrawn from a separate power supply supplying power to the regulator. Thus, this power supply needs to be designed to tolerate this large current (e.g., with small output impedance), otherwise the power input voltage at the power input terminal of the regulator may experience a drop that causes start-up failures.
FIG. 2 shows similar effects as the ones shown in FIG. 1, but for the shut-down process of a DC-DC switching voltage regulator. Similar precautions must be taken to avoid the damage of external components and bond wires.
During shut-down, a current discharge path controls the output voltage slew rate. During the discharge, the Buck converter behaves as a boost circuit causing a voltage peak on the power input terminal (i.e., a circuit node connected to the power output of a separate power supply). This peak can damage the Buck converter and any other circuit attached to the power output of the same power supply. A large input capacitor at the power input terminal may be used to solve this problem.
FIG. 3 shows the output voltage waveform (300) and the load current waveform (310) of a prior art regulator in a transient load test. The load current waveform (310) shows a negative step (311) corresponding to the output node voltage peak (301) that slowly settles back based on its discharge path. Many high-efficiency DC-DC switching voltage regulators maintain a weak/controlled discharge path to ground, thus forcing this output node voltage peak (301) to settle very slowly to a DC value.
Soft-start and soft-stop circuits are typical circuits that help prevent the voltage overshoots and current peaking that can damage the circuit during start-up and shut-down. They perform this function by controlling the voltage ramp on the output node. Different approaches are introduced in the literature to perform these functions. The key figures of merit for soft-start and soft-stop circuits are: 1) circuit area (e.g., smaller area is preferred), and 2) circuit static current (e.g., preferred to be inactive with low static current during normal operation to improve power efficiency).
In DC-DC switching voltage regulators, the output follows the reference input (Vref). A common approach in soft-start architectures is to control the Vref ramp-up during start-up and thus controlling the output ramp irrespective of the loop speed.
FIG. 4 shows a prior art analog circuit (400) used to control the Vref ramp-up during start-up. In the circuit (400), a current source (401) and a capacitor (402) are used to generate a ramp voltage Vramp used as Vref during start-up. The capacitor (402) requires a very large capacitor value to achieve a start-up time in the hundred's of microseconds range. In most cases this capacitor (402) needs to be off-chip (external) leading to extra cost and an increase in printed circuit board (PCB) area. This solution cannot be used in low cost applications.
FIG. 5 shows a prior art digital circuit (500) used to control the Vref ramp-up during start-up. In the circuit (500), a digital-code word is generated and converted into an analog level Vramp through a digital-to-analog converter (DAC) (501). This output level Vramp is used as the reference voltage Vref for the DC-DC switching voltage regulator. Although this is a low-cost solution, this solution does not provide the functionality of the soft-stop circuit and any transient controllers.